This layout graph is my 8-bit barrel shifter, which is one of the main components of my final project for VLSI design. This shifter supports shift amounts from 0 to 7 bits, controlled by a one-hot signal generated by a decoder at the bottom left. It can do both logical and arithmetic shifts, controlled by a 2:1 multiplexer at the top left. The shifter outputs are then routed to eight output buffers on the right, making the output restoring.